MOV-1 Reference Card
MOV-1 TTA address map
Legend Destination
0 1 2 3 4 5 6 7
MU+RF : Memory Unit Register File 0 R00 R01 R02 R03 R04 R05 R06 R07
MU+BAM : Memory Unit Block Access Memory 1 R10 R11 R12 R13 R14 R15 R16 R17
MU+MC : Memory Unit Memory Control 2 R20 R21 R22 R23 R24 R25 R26 R27
ALU : Arithmetic Logic Unit 3 R30 R31 R32 R33 R34 R35 R36 R37
CU : Control Unit 4 B0 B1 B2 B3 B4 B5 B6 B7
RxxDM/BxDM/MDDM: decrement source then move 5 MA0 MA1 MA8 MA9 MAL MAH MA MD
RxxMD/BxMD/MDMD: move then decrement source 6 NOP ASC
RxxMI/BxMI/MDMI: decrement source then move 7 CSC CG CGH JPL JPH SRVC JMP
Source MOV Source RMWW
0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
R00 R01 R02 R03 R04 R05 R06 R07 0 R00DM R01DM R02DM R03DM R04DM R05DM R06DM R07DM
R10 R11 R12 R13 R14 R15 R16 R17 1 R10DM R11DM R12DM R13DM R14DM R15DM R16DM R17DM
R20 R21 R22 R23 R24 R25 R26 R27 2 R20DM R21DM R22DM R23DM R24DM R25DM R26DM R27DM
R30 R31 R32 R33 R34 R35 R36 R37 3 R30DM R31DM R32DM R33DM R34DM R35DM R36DM R37DM
B0 B1 B2 B3 B4 B5 B6 B7 4 B0DM B1DM B2DM B3DM B4DM B5DM B6DM B7DM
MDSHR MDROR MDSAR MDSHL MDROL MB MA MD 5 MDSHR MDROR MDSAR MDSHL MDROL MB MA MD
ACCU OPAN AND OR XOR OV ZERO ASC 6 SHL RCL SAL SBL SHR RCR SAR SBR
CSC CG SWCG L8GC R8GC CGL PC 7 CSC CG SWCG L8GC R8GC CGL PC
Source RWM1W Source RMM2W
0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
R00MD R01MD R02MD R03MD R04MD R05MD R06MD R07MD 0 R00MI R01MI R02MI R03MI R04MI R05MI R06MI R07MI
R10MD R11MD R12MD R13MD R14MD R15MD R16MD R17MD 1 R10MI R11MI R12MI R13MI R14MI R15MI R16MI R17MI
R20MD R21MD R22MD R23MD R24MD R25MD R26MD R27MD 2 R20MI R21MI R22MI R23MI R24MI R25MI R26MI R27MI
R30MD R31MD R32MD R33MD R34MD R35MD R36MD R37MD 3 R30MI R31MI R32MI R33MI R34MI R35MI R36MI R37MI
B0MD B1MD B2MD B3MD B4MD B5MD B6MD B7MD 4 B0MI B1MI B2MI B3MI B4MI B5MI B6MI B7MI
MDSHR MDROR MDSAR MDSHL MDROL MB MA MD 5 MDSHR MDROR MDSAR MDSHL MDROL MB MA MD
BIT00 BIT01 BIT02 BIT03 BIT04 BIT05 BIT06 BIT07 6 BIT08 BIT09 BIT10 BIT11 BIT12 BIT13 BIT14 BIT15
CSC CG SWCG L8GC R8GC CGL PC 7 CSC CG SWCG L8GC R8GC CGL PC
Legend d'cont
R Register SHL/R Shift
B Block Access Memory 8 word align SAL/R Shift Arithmetic
MA0 8 bit Memory Address: 00xxh SBL/R Shift Barrel 4 bit
MA1 8 bit Memory Address: 01xxh ROL/R Rotate
MA8 8 bit Memory Address: 08xxh RCL/R Rotate Trough Carry
MA9 8 bit Memory Address: 09xxh OV Read & test overflow flag
MAL 8 bit Memory Address Low : ##xx h ZERO Read 16bit value zero
MAH 8 bit Memory Address High: xx## h BITxx Bit test on bit xx of OPA
MA 16 bit Memory Address
MD Memory data Status & Control bits
ALUSC ALU Status & Control ---> Stat: ----VCSZ 1Cbbbbbb Ctrl: -------- sCtCtStZ
CUSC CU Status & Control ---> Stat: -------- -------- Ctrl: -------- HSIP----
HWD Hardware data
L8GC Read GC 8 bit Left shift tX 0-/10/11 Test flag: None/True/False
R8GC Read GC 8 bit Right shift sC 0-/10/11 Set carry: Don't touch/Clear/Set
SWGC Read CG with low/high byte swapped
CG Constant Generator & HW address V Overflow H Halt
CGH 8 bit CG High: xx## h C Carry S Sleep
JPL 8 bit PC Low: ##xx h S Sign I Int ena
JPH 8 bit PC High: xx## h Z Zero P Program
SRVC 8 bit PC: 0000 0xxx xxxx x000 b
PCC Program Counter Copy 1 TRUE 0 FALSE